This invention relates to the field of electronic amplifier circuits, particularly to the type of amplifiers used in wideband systems in portions of the radio frequency spectrum above one gigahertz.
Distributed amplifiers in which a plurality of individual amplifier circuits are disposed between taps of an input and an output delay line offer several advantages over more conventional amplifier arrangements, especially when the signal to be amplified is in the gigahertz or higher frequency range, that is, in the frequency band that is often used for radar and similar apparatus. A notable advantage of such amplifier arrangements is their ability to accommodate the input capacitance encountered with transistors, vacuum tubes and other "active" elements used in signal amplification. The ability to regard this amplifier active device input capacitance as being a portion of the input delay line structure and, therefore, not a direct limitation on the frequency response of the amplifier is a particularly notable advantage of the distributed amplifier configuration. As a result of this "hiding" of input capacitance, distributed amplifiers are capable of unusually large operating bandwidths and flat gain versus frequency response.
When considered in some technical detail, however, a number of practical limitations and disadvantages are found to attend most distributed amplifier arrangements. Included is the attainment of undesirably low operating efficiencies, especially a value of power added efficiency [(P.sub.output -P.sub.input)]/[V.sub.bias .times.I.sub.bias [ which is often in the range of 5 to 10 percent.
The low power added efficiency in most distributed amplifier arrangements is a result of the amplifier active devices, that is the amplifier transistors, for example, all consuming DC power even though only about half of the number are producing maximum power output. Frequently this condition is the result of less than optimum loading for many of the distributed amplifier transistors. As a result of these difficulties the prior art has been unable to provide a distributed amplifier arrangement efficient enough to be considered in situations requiring a high efficiency wide band power amplifier, particularly in military and other state of the art equipment.
The prior patent art reveals considerable inventive effort in the field of distributed amplifiers and related apparatus. Particularly notable among the prior patent examples is the patent of R.A. Gilson et al, U.S. Pat. No. 4,564,817, which concerns a distributed amplifier of the above referred-to tapped input delay line and tapped output delay line variety and wherein the amplifying devices connected between respective delay line taps are field effect transistors. The '817 patent is especially concerned with an amplifier arrangement which may be fabricated on a monolithic or single wafer substrate member. The '817 patent also includes a number of refinement such as the use of Gallium arsenide as the substrate fabrication material for the transistors and the delay line and the possible use of two output delay lines in lieu of the more conventional single output delay line.
The prior patent art also includes the patent of R.E.J. Gerard, U.S. Pat. No. 4,532,480, which concerns a power amplifier arrangement similar to a distributed amplifier in which a plurality of field effect transistors that are driven from the taps of an input delay line, drive a segmented output delay line by way of power combiner circuits disposed between the amplifier transistors and the delay line. The '480 patent also contemplates the use of a cascode connected transistors amplifier pair and the use of a power combiner network which includes a tapped winding transformer element. The '480 patent is also concerned with reflected energy and the resulting output Voltage Standing Wave Ratio (VSWR) degradation, and provides accommodation for such reflected energy by way of amplifier shunting resistances. The '480 patent teaches a number of unusual attributes for a distributed amplifier including successively lower impedance levels at the output of each adjacent amplifier stage, the mixture of FET and bipolar transistors in the cascode amplifiers, use of a transformer power combiner, polarized windings for the combiner transformer, and consideration of the input delay line as a filter network [see column 4, line 41]. The distributed amplifier of the instant invention is distinguished from the amplifier of the '480 invention by the differing arrangement of signal combiners and output delay line sections, the use of constant impedance levels, and by the differing accommodation of output encountered reflection signals. In addition, the present invention amplifier is distinguished over the Gerard amplifier by its incorporation of optimum output impedance loading for each 3 terminal active element of the amplifier. The optimum loading in each element yielding maximum output power. Furthermore, since neither the input RF drive level nor the applied DC power are significantly affected, the composite amplifier's gain in power added efficiency as well as power output is increased.
The patent of G.L. Wagner U.S. Pat. No. 4,291,286 also describes a distributed amplifier like arrangement which is identified as a high bandwidth transversal filter in which active amplifier devices are connected between the taps of an input and an output delay line. In keeping with its function as a transversal filter the '286 patent provides a gain weighting factor in association with each of the different amplifier stages. These weighting factors are determined by the drain current of the FET transistor or by a capacitive voltage divider. The '286 patent employs the output delay line as both an additional delay and in the function of a high bandwidth signal summing device. The FETs of the '286 patent therefore function to provide high impedance loads at the input delay line taps, serve as weighted amplifiers, and act as part of the input and output impedance matching networks. The instant invention is distinguished over the disclosure of the '286 patent by its use of a delay line-combiner arrangement, by the improved loading provided for the amplifier transistors, by the gain adjustment in selected of the amplifier circuits, and by the single transistor amplifier stages, and other distinctions.